Introduction

Prelab

1. Review the tutorial IC Layout Using Magic, especially the section "Extraction for Simulation".
2. The MOSIS website (www.mosis.org)  gives electrical parameters for the AMI 0.5µm process.  Go to the MOSIS website to get electrical parameters from the latest run of this process.  Use these parameters to calculate the capacitance of a metal square of size 50 lambda X 50 lambda.
   

1. Magic Tutorial #8: Circuit Extraction
2. IRSIM Manual Page
3. EXT2SIM Manual Page

In the Lab

1. To run SUE and IRSIM, edit your ".bashrc" shell setup file and add the line:
       source /usr14/cad/cad.setup.bash
   Close all terminal windows and re-open at least one window to run your programs.
   
2. Create a schematic diagram of your AOI-22 cell using SUE and run IRSIM to simulate it as described in Lab 1.
   
3. Start magic with the name of your AOI-22 cell
       % magic cell_name
   
4. Using the Magic "extract" command, extract a netlist for the AOI-22 gate layout that you designed last week.
       extract all
   This will create a Magic extraction file "cell_name.ext" for a magic file called "cell_name.mag". The extraction file contains a netlist of active components, connections, and parasitic components.   Use "more" or a text editor to examine this file.
   
5. Use the Magic "ext2sim" command to convert the extraction file to an IRSIM netlist. Use the command:
       exttosim
   This will create an IRSIM input file "cell_name.irsim".  Examine this file with a text editor or the "more" command.
6. IRSIM requires a parameter file that describes your circuit.  Copy the file "/usr14/cad/lib/ami.prm" into your current working directory.
   
7. Start irsim using the command:
       % irsim ami.prm cell_name.sim
8. Use IRSIM to simulate the operation of your extracted circuit.  To do this, first use the "analyzer" command to select which nets you will want to view in the analyzer window, for example:
       irsim> analyzer A B C D OUT
   Next, make sure to set Vdd! to high and Gnd! to low using the "h" and "l" commands:
       irsim> h Vdd!
       irsim> l Gnd!
   You are now ready to start changing inputs and watching outputs.  You can change your A, B, C, and D inputs directly using the "h" and "l" commands, but you may find it useful to group these inputs into a "vector" of signals that can be set together:
       irsim> vector in A B C D
       irsim> set in 0000
   Then step simulation using the "s" command.  You should notice changes in the analyzer window as simulation proceeds.
9. Exhaustively simulate your circuit using all 16 possible values of A, B, C, and D and compare the values to the truth table and simulation results from your schematic last week. If they are not the same, something is wrong with either your schematic, your layout, or both. Make sure to fix any such problems before proceeding.  Note that if you make any changes to your layout, you need to re-extract the circuit and restart irsim.  HINT: IRSIM accepts text command files using the "@ filename" command.  You can make the process of setting all the possible values a little less painful by creating a file "irsim.cmd" which contains all of the simulation commands and then reading that file using "@ irsim.cmd".
   
10. Because the extracted circuit includes parasitic components, the timing of this simulation should be different than the timing of the schematic simulation you performed in step 1.  You can measure delays between input changes and output changes using irsim's "cursor" feature - when you click the mouse in the analyzer window, it displays a vertical red line and displays the time of the cursor at the top center of the window.  Use this to calculate the rise time and fall time of your gate.
11. To see the effect of loading on gate delay, edit your AOI-22 gate with Magic and add to its output a square piece of metal 1 that is 50 lambda by 50 lambda. Re-extract your circuit, and simulate it again using IRSIM. Use the IRSIM analyzer window to measure the worst-case delay of your modified circuit.
12. To complete the lab, use Gemini to compare your schematic and your extracted circuit. Since your schematic doesn't have any parasitic components, you first need to generate a ".sim" file that has no parasitics. Do this with the Magic commands:
extract no resistance
extract no capacitance
extract all
exttosim

Then edit the resulting .sim file with a text editor and remove any remaining capacitance lines.  Use Gemini to compare the to files with the command:
% gemini file1.sim file2.sim
If Gemini reports any errors, fix them before completing your lab and describe them in your report.

Report

1. A short technical memorandum which describes (a) what was done, (b) what you learned, and (c) what difficulties you encountered. Discuss any errors you found in your layout, describing how you found out what was wrong and how you fixed the problems.
2. A printout of the IRSIM analyzer window showing the correct operation of your extracted circuit under all possible values.
   
3. A printout of the IRSIM analyzer window "expanded' to show any gate delay for your extracted circuit .
   
4. A printout of the IRSIM analyzer window showing the gate delay for your circuit after you added the 50 lambda X 50 lambda square metal load.
5. Plots of your original schematic and your final layout.