Prof. John A. Nestor (Lecture, Lab - Sect. 1)
Office: 426 AEC
Office Hours: MWF 3-4, MW 5-6
Phone: (610) 330-5411
E-mail: nestorjMr. Chris Nadovich (Lab - Sect. 1E)
Office: 420 AEC
Office Hours: TBA
Phone: (610) 330-5324
E-mail: nadovicc
Lecture
MWF 2:10-3:00
AEC 243
Lecture (Eve.)
MW 6:00-7:20
AEC 429
Lab (Day)
T 8:00-10:50
AEC 400
Lab (Eve.)
R 6:00-8:50
AEC 400
Engineering design involves the creation of a system, product, or process that addresses a specific problem or need while meeting a number of constraints which define whether a design is acceptable. While the most obvious constraints are cost, performance, and power, "real" designs must satisfy many additional constraints. For example, a design must often be compatible with similar products or operate using predefined standards. A design must be manufacturable - it must be possible to realize a design in large volumes in the face of component variation. A design must address concerns about its impact on environment and whether it is sustainable. A design must satisfy concerns about the health and safety of the public. And finally, a design must address concerns about its larger social, political, and ethical impact.
Constraints often conflict. For example, it is very difficult to create a design that is both low power and high performance. In cases like this it is necessary to compromise and find tradeoffs between the different constraints to reach a solution that is acceptable for the problem the design is intended to address.
Real design problems are often very complex. For example, a modern microprocessor contains hundreds of millions of transistors and is manufactured in a fabrication facility that costs billions of dollars. Design projects of this complexity cannot be created by an individual engineer; instead teams of engineers and scientists from several disciplines must work together. Design usually involves the consideration of alternative approaches, where often the most obvious approach may not be viable due to constraints. A key part of the design is verification; i.e., ensuring that the manufactured design will work as intended.
The goal of this course is to learn about engineering design in two ways: 1) by example - by discussing the design process, learning about common tools for project planning, and considering case studies of well-known design projects; and 2) by doing - creating a design given a list of requirements and constraints. This will involve the application of the fundamentals knowledge of ECE that you have gained over the last three years.
Thr design project for this course will involve the design and construction of a local area computer network (LAN) based on the Ethernet standard. The network will connect together several "stations" and will be capable of sending and receiving packets of data between any two stations. Each lab group will create a design which must be able to communicate with other groups' designs. At the end of the semester, you will perform experiments to evaluate the performance of the network. Finally, you will present a short demonstration of your working project to the ECE faculty. A key deliverable of the project will be a design report which documents the design and the process you used to create, debug, and verify the design.
The design project will be implemented using Field Programmable Gate Arrays (FPGAs). FPGAs are becoming increasingly popular because they allow designs to be quickly implemented, tested, and manufactured. Much of our design work will be done using the Verilog Hardware Description Language (HDL), which is an engineering standard (IEEE 1364). HDLs are widely used in industry for the design of large-scale digital systems using both FPGAs and application-specific integrated circuits.
See the Course Syllabus for details about course grading and administration.
Laboratory
30%
Final Project
30%
Quizzes & Homework 20%
Final Exam
20%